TECHNICAL MANAGER
JOB DETAILS
| Company | Cache Next Generation | |
| Location | Chennai | |
| Channel | Project management | |
| Date | Sep 08, 2008 | |
| Employment | Permanent | |
| Salary | unspecified | |
| Tagged as | ||
JOB BODY
Responsibilities:
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1. Acquire and demonstrate technical knowledge of inspector software
2. Participate in requirements definition, technical reviews, offshore team coordination
3. Do requirements analysis, architectural analysis, design, devpt. and unit testing
4. Acquire knowledge of key use cases in defect inspection using WIN tools
5. Follow KT defined software development processes (CMM)
6. Lead teams to develop key features
-----------------------
1. Acquire and demonstrate technical knowledge of inspector software
2. Participate in requirements definition, technical reviews, offshore team coordination
3. Do requirements analysis, architectural analysis, design, devpt. and unit testing
4. Acquire knowledge of key use cases in defect inspection using WIN tools
5. Follow KT defined software development processes (CMM)
6. Lead teams to develop key features
Description: This person has to be academically sound with good development experience. Should be able to drive requirements/design problems to closure within the constraints of the current system. Should have enough engineering background to gain a deep understanding of KLA-Tencor?s domain and working of its tools.
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Qualifications in priority order:
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1. Required: Strong academics ? BE/BTech/MS/MTech/PhD with 5 to 9 years experience
2. Required: Strong in programming fundamentals, C++, VC++, MFC
3. Required: Good analytical and problem solving abilities
4. Required: Experience in developing engineering or scientific applications
5. Required: Experience in providing technical leadership for large projects
6. Required: Thorough knowledge of SDLC and software engineering
7. Preferred: Experience in .Net and C#
8. Preferred: Experience in defining requirements, leading project teams
9. Optional: Knowledge of CMM or other process models
10. Optional: Knowledge of KT specific or general semiconductor domain
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